An integrated circuit die may include one or more gated power domains for which power may be selectively applied and disrupted, referred to as power gating. Conventionally, power gating is used to intermittently disable or deactivate an entire gated power domain to conserve power when circuitry of the gated power domain is not needed. This may be referred to as placing the gated power domain in a sleep mode or state.
Power gates present an inherent resistance between a power supply and a gated power distribution grid (gated grid). A gated grid voltage may differ from a power supply voltage based on the resistance of the power gates and current consumption of the corresponding gated power domain, in accordance with Ohm's law.
The power supply voltage may be set based on anticipated load conditions. Out of caution, maximum load conditions or maximum current consumption may be assumed. During operation, however, a gated power domain may draw less current from the gated grid than anticipated, and/or the current draw may vary over time.
When the gated power domain draws less current than anticipated, the voltage drop over the corresponding power gates is less than anticipated. As a result, the gated grid voltage may be higher than a target gated voltage. The higher gated voltage may not necessarily improve performance of the gated power domain, and may decrease power efficiency through leakage and/or active power dissipation.
In the drawings, the leftmost digit(s) of a reference number identifies the drawing in which the reference number first appears.